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 M52390FP
NTSC/PAL Encoder
REJ03F0080-0100Z Rev.1.0 Sep.22.2003
Description
The M52390FP is a semiconductor integrated circuit that has a function for converting R, G and B signals into NTSC/PAL composite video signals, as well as a superimpose function, on a single chip.
Features
* RGB encoder-related Built-in LPF for color discrimination. An external resistor enables cutoff frequency control. An internal VCA circuit enables gain control of the chroma unit. A high-precision modulation circuit and clamping circuit realize low carrier leaks. Burst and synch signals are generated in the IC. * Superimpose-related YS IN (control input) enables switching between two input signals, VIDEO IN and RGB IN. An internal high-speed analog switch makes it possible to insert fine text. An internal APC circuit automatically adjusts the color phases of new screen (VIDEO IN) and RGB encoder signals. * Overall The VIDEO OUT signal is output at 2 VP-P, making it possible to configure a 75 drive circuit with a single transistor. Both NTSC and PAL are supported.
Application
* TVs, VCRs, monitors and other audio/video devices
Recommended Operating Conditions
* Power supply voltage range: 4.7 to 5.3 V * Recommended power supply voltage: 5.0 V
Rev.1.0, Sep.22.2003, page 1 of 22
M52390FP
Block Diagram
Pin Configuration
Rev.1.0, Sep.22.2003, page 2 of 22
M52390FP
Description of Pin
Pin no. 1 2 Pin name GND C.SYVC IN Pin peripheral circuit Pin voltage Notes
AC: Sync input
VTH = 2.5 V 0.3 V
3
HHK
AC
The HHK pulse width can be varied using the external resistor. Recommended value: HHK: 3/4H R = 91 k C = 270 p
4
OFFSET R
DC = 3.1 V
External recommended value. C = 0.1
5
TRAP
AC: Chroma
Burst: 300 mVP-P [15] Test mode output at 5 V [12] Hi: R-Y output [12] Lo: B-Y output
External recommended value. L C NTSC : 15 12P PAL : 10 12P [5] 5 V: Test mode setting [15] Pulse output
Rev.1.0, Sep.22.2003, page 3 of 22
M52390FP
Description of Pin (cont)
Pin no. 6 Pin name OFFSET B Pin peripheral circuit Pin voltage DC: 3.1 V Notes External recommended value C = 0.1
7
VCXO IN
DC: 3.2 V
The free run frequency is set using the trimmer capacitor. [7] 0 V: Carrier OFF
8
APC FILTER
DC: 3.3 V In Free Run mode: DC: 2.7 V
characteristic Frequency
APC voltage External recommended values R = 1.5 k C1 = 0.01 C2 = 1 Clamping input (burst timing) External recommended value C = 4.7 [9] 0 V: Free Run mode setting
9
VIDEO IN
AC: VIDEO 1 VP-P Pedestal: 2.9 V
Rev.1.0, Sep.22.2003, page 4 of 22
M52390FP
Description of Pin (cont)
Pin no. 10 Pin name VIDEO OUT Pin peripheral circuit Pin voltage AC: VIDEO 2 VP-P Pedestal: 1.8 V Notes
11 12
VCC Ys
DC: 5 V Switching signal input when using Superimpose
Icc: 50 mA VTH = 1.5 V 0.3 V Hi: RGB IN output Lo: VIDEO IN output [15 Output setting when using 5 V [5] Output
Hi: Insertion screen (RGB IN output)
13
VRE G
DC: 2.1 V
External recommended value C = 4.7
14
Y IN
AC: Y 0.5 VP-P Pedestal: 2.1 V
15
Y OUT
AC: Y 1 VP-P Pedestal: 2.1 V
(5) Test mode output at 5 V Pulse output
[12] 5 V: Test mode setting
Rev.1.0, Sep.22.2003, page 5 of 22
M52390FP
Description of Pin (cont)
Pin no. 16 Pin name B IN Pin peripheral circuit Pin voltage AC: B 0.71 VP-P Sync: 2.9 V Notes Clamping input (burst timing) External recommended value C = 4.7
17
G IN
AC: G 0.71 VP-P Sync: 2.9 V
Clamping input (burst timing) External recommended value C = 4.7
18
R IN
AC: R 0.71 VP-P Sync: 2.9 V
Clamping input (burst timing) External recommended value C = 4.7
19
COLOR CONT.
DC: 2.5 V
Color control for RGB encoder output 5 V: Chroma unit +2 dB 2.5 V: Typ. 0 V: Chroma unit -3 dB
20
fc. CONT.
DC: 3.3 V
fc of LPF can be adjusted using external resistor. External recommended value R = 30 k
Rev.1.0, Sep.22.2003, page 6 of 22
M52390FP
Absolute Maximum Rating
(Unless otherwise noted, Ta = 25C)
Symbol Vcc Pd Topr Tstg k Item Power supply voltage Internal current consumption Ambient operating temperature Storage temperature Thermal derating (Ta = 25C) Ratings 7 620 (900) -20 to 75 -40 to 125 6.2 (9.0) Units V mW C C mW/C
Note: Values in parentheses are the values when mounted on a typical PCB.
Thermal Derating (Maximum Rating)
Rev.1.0, Sep.22.2003, page 7 of 22
M52390FP
Electrical Characteristics
(unless otherwise noted, Ta=25C, Vcc = 5 V, SG2 = sync)
No. Symbol Item Measurement conditions Mea- Limits surement Min. Typ. point [11] [11] [15] [15] [15] [15] [15] 35 37 0.27 0.53 0.09 0.63 -1.5 50 52 0.30 0.59 0.11 0.71 0 Unit Max. 65 67 0.33 0.65 0.13 0.79 1.5 mA mA Vp-p Vp-p Vp-p Vp-p dB
1 ICC1 Circuit current 1 2 ICC2 Circuit current 2 RGB IN Y OUT 3 ER Matrix ratio R 4 EG Matrix ratio G 5 EB Matrix ratio B 6 EY At RGB 100% Y level 7 FR R IN Y OUT frequency characteristic 8 FG G IN Y OUT frequency characteristic B IN Y OUT frequency characteristic
NTSC MODE, [12] 5 V NTSC MODE, [12] 5 V SG18: 1 Vp-p SG17: 1 Vp-p SG16: 1 Vp-p SG16, SG17, SG18: 0.71 Vp-p SG18: 500 kHz/5 MHz, 0.5 Vp-p CW, SW16, 17, 18:ON [2] 0 V (SG2: OFF) SG17: 500 kHz/5 MHz, 0.5 Vp-p CW, SW16, 17, 18:ON [2] 0 V (SG2: OFF) SG16: 500 kHz/5 MHz, 0.5 Vp-p CW, SW16, 17, 18:ON [2] 0 V (SG2: OFF)
[15]
-1.5
0
1.5
dB
9
FB
[15]
-1.5
0
1.5
dB
10 11 Y IN 12 13
VS1 Sync level 1 NTSC MODE VS2 Sync level 2 PAL MODE (SW13: ON) VIDEO OUT GY Y IN VIDEO OUT gain SG14: 500 kHz, 0.5 Vp-p CW, [12] 5 V FY Y IN VIDEO OUT frequency characteristic SG14: 500 kHz, 0.5 Vp-p CW, [12] 5 V SG18: 1 Vp-p [15] 5 V, [12] 5 V, [7] 0 V SG16: 1 Vp-p [15] 5 V, [12] 0 V, [7] 0 V SG18: 500 kHz, 0.5 Vp-p CW, SW4, 6, 17, 18: ON [15] 5 V, [12] 5 V, [7] 0 V, [19] 5 V/2.5 V, [2] 0V (SG2: OFF) SG16: 500 kHz, 0.5 Vp-p CW, SW4, 6, 17, 18: ON [15] 5 V, [12] 0 V, [7] 0 V, [19] 5 V/2.5 V, [2] 0V (SG2: OFF) SG18: 500 kHz, 0.5 Vp-p CW, SW4, 6, 17, 18: ON [15] 5 V, [12] 5 V, [7] 0 V, [19] 0 V/2.5 V, [2] 0V (SG2: OFF) SG18: 500 kHz, 0.5 Vp-p CW, SW4, 6, 17, 18: ON [15] 5 V, [12] 5 V, [7] 0 V, [19] 0 V/2.5 V, [2] 0V (SG2: OFF)
[15] [15] [10] [10]
257 270 10.5 -1.5
286 300 12 0
315 330 13.5 1.5
Vp-p Vp-p dB dB
RGB IN TRAP 14 DL(R-Y) Delay (R-Y) 15 16 DL(B-Y) GH(R-Y) Delay (B-Y) Gain (R-Y) VCA: Hi
[5] [5] [5]
210 210 1
310 310 2
410 410 3.5
ns ns dB
17
GH(B-Y)
Gain (B-Y) VCA: Hi
[5]
1
2
3.5
dB
18
GL(R-Y)
Gain (R-Y) VCA: Lo
[5]
-4.5
-3
-2
dB
19
GL(B-Y)
Gain (B-Y) VCA: Lo
[5]
-4.5
-3
-2
dB
Rev.1.0, Sep.22.2003, page 8 of 22
M52390FP
Electrical Characteristics (cont)
No. Symbol Item Measurement conditions Mea- Limits surement Min. Typ. point [10B] 243 [10B] 255 [10B] -30 [10B] 82 [10B] 2.68 [10B] 2.51 [10B] 1.91 [10B] -- [10B] 96 [10B] 233 [10B] 339 286 300 0 90 3.15 2.95 2.25 -40 104 241 347 Unit Max.
RGB IN VIDEO OUT 20 VB1 NTSC burst level 21 22 23 24 25 26 27 28 29 30 VB2 VB3 PPB VR/B VG/B VB/B VC/B PR/B PG/B PB/B PAL burst level PAL burst level differential PAL burst phase differential R/burst level ratio G/burst level ratio B/burst level ratio NTSC MODE carrier leak R/burst phase differential G/burst phase differential B/burst phase differential VIDEO OUT VIDEO IN OUT gain VIDEO
NTSC MODE [12] 5 V PAL MODE (SW13: ON) [12] 5 V PAL MODE (SW13: ON) [12] 5 V PAL MODE (SW13: ON) [12] 5 V SG18: 0.71 Vp-p [12] 5 V SG17: 0.71 Vp-p [12] 5 V SG16: 0.71 Vp-p [12] 5 V NTSC MODE [12] 5 V SG18: 0.71 Vp-p [12] 5 V SG17: 0.71 Vp-p [12] 5 V SG16: 0.71 Vp-p [12] 5 V SG9: 500 kHz, 0.5 Vp-p CW, SW9: ON [12] 0 V, [2] 0 V (SG2: OFF) SG9: 5 MHz, 0.5 Vp-p CW, SW9: ON [12] 0 V, [2] 0 V (SG2: OFF) SG9: 3.85 MHz, 286 mVp-p CW, SG12: 1 Vp-p SG9: burst, 286 mVp-p CW, SG12: 1 Vp-p PAL MODE (SW13: ON) [5] 5V [5] 5V [5] 5V
329 345 30 98 3.62 3.39 2.59 -28 112 249 355
mVp-p mVp-p mVp-p deg
dB deg deg deg
VIDEO IN 31 GVIO
[10]
5
6
7
dB
32
FVIO
VIDEO IN VIDEO OUT frequency characteristic
[10]
-1.5
0
1.5
dB
SUPER IMPOSE 33 PDI RGB/VIDEO IN burst phase differential 34 VOS DC offset MMV 35 HHK 36 37 BFPP BFPW
[10B] -5 [10] -20
0 0
5 20
deg mV
HHK width BFP position (burst position) BFP width (burst width)
[2] [15] [2] [15] [15]
40 4.5 2.0
47 5.6 2.5
54 6.7 3.0
s s s
Rev.1.0, Sep.22.2003, page 9 of 22
M52390FP
Electrical Characteristics Measurement Method
Tables for the various modes (common to all tests)
Mode FREE RUN MODE Setting condition Function VCXO FREE RUN
PAL MODE
Carrier phase for MOD R reversed at each 1H [10] VIDEO OUT RGB ENCODE signal out VIDEO IN signal out [5] Color difference output MOD R-Y out MOD B-Y out DIFF R-Y out DIFF B-Y out
SUPER IMPOSE MODE
TEST MODE MR TEST MODE MB TEST MODE DR TEST MODE DB
TEST MODE P
[10] PULSE output PAL MODE: BFP, HHK mix NTSC MODE: BFP Various pin voltages when SYNC is input to [2] (C. SYNC IN) (for clamping)
V4, V6, V9, V16, V17, V18
Rev.1.0, Sep.22.2003, page 10 of 22
M52390FP Measurement method and method for computing limit values
Meas. no. 1 2 3 4 5 Measurement method and method for computing limit values Current flowing into [11] is measured.
6
7 (8, 9)
10 11
12
Rev.1.0, Sep.22.2003, page 11 of 22
M52390FP Measurement method and method for computing limit values (cont)
Meas. no. 13 Measurement method and method for computing limit values
14 (15)
13
14 (15)
16 (17) 18 (19)
Rev.1.0, Sep.22.2003, page 12 of 22
M52390FP Measurement method and method for computing limit values (cont)
Meas. no. 20 21 22 Measurement method and method for computing limit values
23
PPS = |PnH burst phase - P(n + 1)H burst phase| 24 (25, 26)
27
28 (29, 30)
Rev.1.0, Sep.22.2003, page 13 of 22
M52390FP Measurement method and method for computing limit values (cont)
Meas. no. 31 32 Measurement method and method for computing limit values
33
34
Rev.1.0, Sep.22.2003, page 14 of 22
M52390FP Measurement method and method for computing limit values (cont)
Meas. no. 35 Measurement method and method for computing limit values
36
Rev.1.0, Sep.22.2003, page 15 of 22
M52390FP
Test Circuit
Rev.1.0, Sep.22.2003, page 16 of 22
M52390FP
Usage Precautions
(1) Typical values for input signals
(2) Setting the Free Run frequency This IC generates the fsc by means of the VCXO circuit. Consequently, the VCXO oscillation frequency must always be set to fsc before the IC is used, by following the procedure outlined below. 1. Connect [9] (VIDEO IN) to GND, and set the Free Run mode. 2. Set the [2] (OFFSET R) voltage when SYNC was input to [4] (C. SYNC IN) to V4, and apply a voltage of V4 = 0.5 V to [4] (OFFSET R). 3. Fix C.[2] (SYNC IN) in the High state. (5 V applied) 4. Adjust the output frequency of [5] (TRAP) to the trimmer capacitor of [7] (VCXO IN), and set it to fsc.
Rev.1.0, Sep.22.2003, page 17 of 22
M52390FP (3) Setting the color difference LPF The frequency characteristic of the color difference LPF built into this IC can be set as shown in Fig. 1, using the [20] (fc CONT.) external resistor. When doing this, the group delay characteristic also changes, as shown in Fig. 2.
(4) Setting Y DL The group delay characteristic of the color signal of the RGB encoder output changes in response to the [20] (fc CONT) external resistor, so Y DL should be set in such a way that the group delay characteristic is the amount of group delay obtained from the group delay characteristic of Fig. 2, with 40 ns added. Also, if the [6] (TRAP) circuit is being added, a further delay of +5 to +10 ns should be taken into consideration. (5) COLOR CONT characteristic The gain of the chroma unit can be set as shown in Fig. 3, using the [19] (COLOR CONT) applied voltage. (The burst amplitude is constant.)
Rev.1.0, Sep.22.2003, page 18 of 22
M52390FP (6) The relationship between BFP and HHK The pulse width of BFP and HHK can be set as shown in Fig. 4, using the [3] (HHK) external CR.
(7) Input pin drive Input pins [9], [16], [17], and [18] use clamp input, so they should always be driven with a low impedance. (8) Input/output relationship between SYNC and burst during the V cycle
(9) V DL and YS DL settings when the SUPERIMPOSE mode is being used 1) V DL is used to adjust the timing of the RGB encoder signal and the VIDEO IN signal. 2) YS DL is used to adjust the timing of the RGB encoder signal and the Ys IN signal. 3) When the timing is the same for C. SYNC IN, RGB IN, VIDEO IN and Ys IN, V DL and YS DL should be set using the amount of delay shown below as a guide.
V DL = Y DL (item 4) + 10 (ns) YS DL = Y DL - 10 (ns)
Rev.1.0, Sep.22.2003, page 19 of 22
M52390FP
Application Example (1)
Example showing RGB video signals being encoded in NTSC/PAL signal
Rev.1.0, Sep.22.2003, page 20 of 22
M52390FP
Application Example (2)
Example showing RGB text signals superimposed on NTSC/PAL signals (*The values in brackets show what takes place when the RGB signals of a personal computer or other device are superimposed on NTSC/PAL signals as a sub-screen.) If signals delayed by approximately 350 nm after the text (*sub-screen) RGB signals are created directly, as Ys signals, Ys DL is not necessary. If RGB and Ys are at same timing, the delay time of Ys DL should be set to 350 ns (typical).
Rev.1.0, Sep.22.2003, page 21 of 22
M52390FP
20P2N-A
JEDEC Code -- e b2
11
MMP
Weight(g) 0.26 Lead Material Cu Alloy
Plastic 20pin 300mil SOP
EIAJ Package Code SOP20-P-300-1.27
Package Dimensions
20
HE
E
L1
L
Rev.1.0, Sep.22.2003, page 22 of 22
e1
Recommended Mount Pad Symbol
10
1
F A
G
D
b
A2 x
M
A1
e y
A A1 A2 b c D E e HE L L1 z Z1 x y c
z Detail G Detail F
Z1
b2 e1 I2
Dimension in Millimeters Min Nom Max -- 2.1 -- 0.1 0.2 0 1.8 -- -- 0.5 0.35 0.4 0.2 0.18 0.25 12.6 12.7 12.5 5.3 5.4 5.2 1.27 -- -- 7.8 8.1 7.5 0.8 0.6 0.4 -- 1.25 -- -- 0.585 -- -- -- 0.735 -- -- 0.25 -- 0.1 -- -- 0 8 -- -- 0.76 -- 7.62 -- 1.27 -- --
I2
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
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1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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